Joseph Beatrice Seventline

Joseph Beatrice Seventline

Professor

Education

Ph. D.

J.Beatrice Seventline is from Visakhapatnam, Andhra Pradesh. She has a rich teaching experience of almost 32 years and research experience of 20 years. She has published almost 70 technical papers in reputed journals and conferences. Her research interests are in Radar Signal Processing, VLSI signal Processing, Image Processing and Applications of AI/ML Algorithms to signal and image processing solutions. She is a member of ISTE and IETE.

Research Publications

  • Ternary Chaotic Pulse Compression sequences ,JB Seventline, D Elizabath Rani, K Raja Rajeswari,Journal of Radio Engineering, September 2010, Brno University, Czech public, Vol.19, No:3, pp. 415-420.Impact factor-0.739,ESCI Journal
  • VLSI implementation of distributed arithmetic based block adaptive finite impulse response filter, Pratyusha Chowdari, Ch. , Seventline, J.B.,Materials Today: Proceedings, 2020, 33, pp. 3757–3762
  • LH-CORDIC: Low power FPGA based implementation of CORDIC architecture, Inguva, S.C. , Seventline, J.B.,International Journal of Intelligent Engineering and Systems, 2019, 12(2), pp. 305–314
  • Implementation of FPGA Design of FFT Architecture based on CORDIC Algorithm, Dr. Sharath Chandra Inguva & Dr. J.B. Seventiline ,International Journal of Electronics, Vol.108, Feb 2021,Issue 11,pp.1914-1939.
  • A hybrid learning framework for multi-modal facial prediction and recognition using improvised non-linear SVM classifier, Saiteja, C. , Seventline, AIP Advances, 2023, 13(2), 025316J.B.

Expertise

  • Check Icon Leading and working in collaboration with a team to achieve tangible outcomes
  • Check Icon Planning and execution of an assigned task
  • Check Icon Conduction of International and national conferences and workshops
  • Check Icon Mentoring and counselling of weak students.
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